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Erschienen in:
22.12.2023 | Originalarbeit
Analysis and compensation of stress effects on CMOS reference current sources
Erschienen in: e+i Elektrotechnik und Informationstechnik | Ausgabe 1/2024
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Abstract
This paper carries out the analysis of the stress-induced effects on a 180-nm temperature-invariant CMOS reference current source using the previously designed stress-dependent MOSFET and resistor models by simulations. The encapsulation of chips is often made from polymers (such as epoxy) which are poured over the silicon chips. When the encapsulation cools down, it generates a significant amount of static mechanical stress in the ICs which changes their performance. Critical parts of the reference current source circuit that are most sensitive to stress are identified and a compensation method is presented. The simulations show that the presented compensation method significantly lowers the sensitivity of the reference current to stress.