Efficient electromagnetic interference modeling of a gallium nitride half bridge

The electrification of vehicles makes an important contribution to achieve the global goal of de-carbonization. But, we are nowadays faced with the challenge of providing the required electrical energy in a low-loss, environmentally friendly, CO2-neutral and resource-saving manner. Power semiconductors based on wide-bandgap materials such as gallium nitride (GaN) or silicon carbide (SiC) are increasingly being used to improve efficiency of power electronic systems. Thanks to their low switching losses, power electronic components can nowadays be accommodated in a very confined space. This saves not only space but also weight, two important factors in the construction of electric vehicles. Wide-bandgap semiconductors have many advantages over conventional silicon-based semiconductors. Among other things, the switching frequencies can be significantly increased. However, this also means that the generated electromagnetic emissions shift to ever higher frequency ranges and cannot be handled so easily.

In order to estimate the generated electromagnetic emission of the final product as precisely as possible, it is necessary to consider all components in simulation, from the ICs used (e.g. the power semiconductors) to the printed circuit board with the wiring loops and the passive components, to the housing with connected cable harness. Such simulations must be easy to use even for engineers not particularly trained in Electromagnetic Compatibility (EMC) and provide a useful result as quickly as possible to check if the application complies to EMC regulations.

To achieve a good agreement between simulation and the final electromagnetic emission measurement performed in an EMC lab, the simulation should be based on standardized EMC measurements and include accurate replicas of all components used in the measurement, such as EMI receiver, line impedance stabilization network, power supply, wiring harness, etc.

In recent years, researchers have focused on improving the accuracy and reducing the complexity of EMC simulations. A modeling approach that is capable of describing EMC behavior as accurately as the functional behavior of power electronic devices is crucial. In [1] a macro modeling technique of a power of electronic diode was presented that allows the reduction of the complexity of simulation models with adequate accuracy.

Techniques for modeling the components of a converter circuit based on a parameter tuning method for simulating the magnetic field are discussed in [2]. The modeling and simulation of four different types of power electronic converters are studied in [3]. In this paper the generated electromagnetic emission is categorized into differential and common mode interference. The parasitic behavior of resistors, capacitors and inductors is taken into account in the simulation of conducted emission by using a model of a Line Impedance Stabilization Network (LISN).

The modeling effort is essentially a function of the frequency range under consideration. Three ranges exist, which are displayed in Fig. 1. The impact of control is usually seen in the lower kHz range, where control strategies must explicitly be modeled using simulators like Simulink or PLECS®. Above, in the range from some 100 kHz to some MHz, Spice solvers are best applied. Prominent Spice solvers are PSpice® and LTSpice®, and Spice solvers are also used inside electromagnetic simulation tools like CST Studio Suite® or Ansys Designer. In this article, LTSpice® is used. The frequency range from 100 kHz is very important. The CISPR25 [4] emission limits come into play at 150 kHz, and, at these frequencies, filter elements are very large. An early understanding of the emission in the 100 kHz … 1 MHz range is hence crucial to estimate the efforts required for EMC design. Above about 30 MHz, parasitic elements dominate and intricate electromagnetic computations are needed—model effort increases significantly. In this paper we focus on the medium frequency range, because it is both fairly easy to model and essential to examine.

The remainder of this paper is organized as follows:

In Sect. 2, a short introduction to the model construction of such an EMC simulation based on an important automotive emission measurement technique is derived. In Sect. 3 the measurement setup is shown together with the modelling results of the electromagnetic emission simulation. The validation of the models is performed by a comparison of the simulation and measurement results. Finally, in Sect. 4 we summarize the proposed modeling approach in a table that may serve as a comprehensive modeling recipe. We end with conclusions in Sect. 5.

The conducted emission test based on the so-called voltage method defined in the CISPR25 standard [4] is one of the most prominent measurements to examine the EMI of battery-driven electronics. It provides information about the test setup to characterize the conducted electromagnetic emission of components/modules together with emission limits in the radio frequency bands from 150 kHz (Long Wave) to 108 MHz (FM band). In power electronics, the dominant source of emission is the power transistor. The emission spectrum that is caused by the switching activity of these transistors decays with increasing frequency depending on the switching time as well as the corresponding rise- and fall time [5]. At the low frequency end, the emission is strongest. In order to reduce the emission in the low frequency range additional filter elements are often needed to reduce the emission below the limits. Such filter elements are expensive and large. Sometimes they can only appropriately be dimensioned in the course of the prototype test phase, in which the final electromagnetic emission is measured and the filters adjusted to reduce the emission below the required limits. For these reasons, an early assessment of the conducted emission of a power electronic system according to CISPR25 is essential, because the result determines volume and hence cost of the EMI filter.

Figure 2 shows a sketch of the test setup. Inside a shielded enclosure there is a table with a metallic surface on top, acting as a ground/reference plane on which the Device-under-test (DUT) and the cable harness is located. The DUT is separated to this surface by a 50 ± 5 mm support made of a non-conductive, low relative permittivity material (ε_r ≤ 1.4). Often, polystyrene is used as the non-conductive material.

The DUT is connected to its load by a wire harness. If applicable, the load can be attached to the power supply. The two power supply wires, plus and minus, are routed separately and each is terminated by a Line Impedance Stabilization Network (LISN), which are connected to the power supply. The length of the supply wires between DUT and LISNs should be between 20 and 40 cm. An EMI receiver is used to measure the voltage at either of the LISNs. The load used in this article is passive and has no connection to the power supply.

The DUT is a printed circuit board with a GaN half bridge stage. The half bridge is made from two 600 V CoolGaNTM IGOT60R070D1 by Infineon [6], the gate signal is generated with an external waveform generator and processed on the board with an auxiliary gate driving circuit. There is an overview of the power stage of the half bridge in Fig. 3. From the left to the right, there is the Direct Current (DC) supply of 10 V, two CERA Link DC link capacitors [7] of nominally 1 µF each, and the two GaN transistors. The load is composed of an R‑L circuit of 10 Ω and an inductance of 10 µH. The gate signals are in 180° phase shift, they have a clock frequency of 200 kHz, a rise and fall time of about 10 ns, and an on-time of 2.4 µs.

The power stage, consisting of the switching transistors and two DC link capacitors C_DC,1 and C_DC,2, as well as power supply and load, provide an excellent starting point to predict the EMI. The required circuit schematic is available early in product development, because the hardware engineers need them for performance optimization. In fact, they are much more complex because they focus for instance on gate-driver design. The hardware engineer usually has such a model ready, and it is efficiently adopted, because it contains the correct models of transistors, capacitors and the load. Next, this model must be adapted to EMC simulation.

In order to evaluate the electromagnetic interference in the simulation, the standardized EMC measurement setup must be modeled accurately. A good agreement between the measurement and simulation result can only be achieved, if accurate models of the whole setup and all measurement devices (e.g. LISN, cable harness, coupling to the reference plane, EMI receiver …) are used.

The first extension consists of the two LISNs, which are attached to the plus and minus supply lines of the half bridge. The circuit schematic of a LISN can be found in its data sheet. Here, the CISPR25 automotive standard is chosen, the measurement was performed with a NNHV8123 by Schwarzbeck [8]. An essential part of the measurement setup is the table with the conductive surface, because it provides the return path for the common mode current. In the conducted emission setup, the electric ground of each LISN is connected to the table; in the present measurement also is the minus pole of the battery. The circuit schematic of a LISN is shown in Fig. 4. The LISNs are connected to the metallic surface of the conducted emission setup. Each LISNs provides a connector for a 50 Ω measurement using an EMI receiver.

The electromagnetic emission is evaluated by means of an EMI receiver in the frequency domain in defined frequency bands (A–E) by prescribed CISPR bandwidths that are specified in the CISPR 16 standard [9]. For bands A to D, the measurement bandwidths are listed as 6 dB bandwidths, and for band E as pulse bandwidths in Table 1.

Different detectors (such as Peak, Quasi-peak, Average, Root Mean Square, Average, CISPR-Average and CISPR-Root Mean Square) are used to rate the electromagnetic emission over frequency. For continuous sinusoidal interference signals the measurement result with the different detectors shows the same reading independent of the used bandwidth. For interference signals that are pulsed, modulated, or slowly changing, the detectors give different values because they weigh the rate of change differently. Such interference signals occur in power electronics applications, for example, when using spread spectrum clocking of the switching frequency to reduce the electromagnetic emissions. Depending on the setting of the spread spectrum parameters, the emission which normally appears as narrowband is spread in the frequency range and thus measured by the EMI receiver as broadband interference. This significantly reduces e.g. the measured values when using the Average or Quasipeak detector. To correctly detect emissions caused by single pulses or pulses with low repetition frequencies, the CISPR16-1‑1 standard also assigns time constants, which increases the measurement time for the final evaluation to about one second. In order to appropriately evaluate the time repetition rate as well as broadband and narrowband disturbances in the simulation and finally to compare the simulation values with the specified limit lines, it is important to take the behavior of the EMI receiver into account. In many cases it is not sufficient for the simulation to use only a simple Fourier transformation of the interference signal from the time domain. A corresponding post-processing of the FFT results in the frequency domain for the evaluation of the distances of the individual interference amplitudes in the frequency range is essential. Additionally, the temporal occurrence of the interference amplitudes within the measurement bandwidth of the measuring receiver must be considered.

In [10], a simulation model of an EMI receiver is presented that emulates the measurement procedure of a CISPR 16 compliant test receiver [9]. The model uses a Fourier transform algorithm and transfers the time-domain input signal at the 50 Ω input of the EMI receiver into frequency domain. It provides the simulated electromagnetic emission in CISPR Band-B/C/D with peak, average, and quasi-peak detector values.

Including the LISNs, we end up with a model as displayed in Fig. 5. Now, the metallic surface of the table is the ground reference. Voltage supply and the LISNs are connected to this reference. The EMI receiver monitors the voltage at the measurement connectors M₊ and M₋. In the simulation, we also record the voltages at these nodes, and the data is processed by software to yield the correct EMI receiver spectrum.

The model of Fig. 5 describes the differential mode only, because there is no current return path, neither a galvanic nor a capacitive one, from the LISNs to the half bridge. The most dominant return path in power electronics is via capacitive coupling, generated by the displacement currents between DUT and the metallic table. This effect is demonstrated in Fig. 6. The differential mode current flows from the positive terminal of the battery into the DUT and returns via the negative terminal. Using the notation of [5], we define this differential mode current as half the difference between the currents I₁ and I₂, which are the currents in the two supply wires with current direction from the supply into the battery. In a two-wire system above a metallic ground, a second mode can exist, which is the common mode. According to [5], this current is the average of the currents I₁ and I₂. The common mode exists because the two LISNs are connected to the table, and because the capacitive coupling between DUT and loads offers a return to close the current loop.

Capacitive coupling is described by the equationwhere C is the capacitance between two metallic conductors, U(t) is the voltage between them, and I_CM(t) is the common mode current. In a complex system and, in particular, at high frequencies, several common mode paths exist. There is a network of capacitances, and various voltage drops on the board contribute to I_CM. For an accurate computation, the application of 3D electromagnetic solvers is indispensable, as for instance done in [11]. However, at 3 MHz, the wave length is 100 m, and we identify the common mode return path by a single capacitance only: since the time derivative of the voltage causes the common mode current, we look for the nodes in the DUT where the largest voltage derivative occurs, and estimate the capacitance between this node and the metallic table.

The switching transistors cause the largest voltage drops. In particular at the switching node, which is the node between the two transistors to which the load is attached, the entire voltage range is swept through. In addition, the load of a power electronic system usually constitutes a large capacitance, because to dissipate the heat large metallic structures for cooling are used (see the shape of the power resistor in Fig. 8). A measurement of the load was performed and yielded a capacitance of 14 pF between the load and the metallic table (see [11] for details). It is important that in this measurement, the load has the same distance to the table as it has in the conducted emission setup, i.e. 50 mm. In the simulation model, we place the measured 14 pF at the switching node.

To finalize the model, we need to consider the data sheets of the DC link capacitors and the transistors. CERA Link capacitors of TDK are used [7], and the inspection of the data sheet reveals that at 10 V, where the validation measurements are performed, the capacitance of the CERA Link capacitors is only 55% of the nominal capacitance. Consequently, we use a capacitance of 0.55 µF for both capacitors in our model. We also add the resistance of the capacitors (12 mΩ at 1 MHz) and its inductance (3 nH), which are values from the data sheet. Secondly, the transistors of the half bridge, the IGOT60R070D1 CoolGaN of Infineon [6], have rise and fall times t_r and t_f of less than 15 ns (if operated correctly; a measurement of the rise and fall times is very helpful in this respect). Hence, their emision spectrum is dominated by the properties of the clock frequencies and not of the rising/falling edge of the drain-source voltage at least up to a frequency of 1/(π t_r) = 20 MHz [5]. We conclude that up to this frequency, any simple switch, which switches on and off with a clock frequency of 200 kHz, is a suitable excitation model¹. We note that a typical signature of transistors in the emission spectrum is a resonance caused by the intrinsic drain-source capacitance of the transistor and the parasitic inductance of the commutation loop. In the investigated half bridge, this resonance occurs, above frequency range considered here, at about 80 MHz, caused by some 10 nH parasitic inductance and a GaN transistor capacitance of about 200 pF. Slower transistors like MOSFETs might have a capacitance, which is ten times higher. In this case, this resonance appears at frequencies of 30 MHz and less, and a suitable transistor model becomes more complex. Eventually, we obtain the circuit of Fig. 7.

A conducted emission measurement was performed with the GaN half bridge in operation at a DC supply voltage of 10 V, as depicted in Fig. 8.

Two LISNs are connected to the board with wires of about 20 cm length. The board and the resistive and inductive load are located on a 5 cm polystyrene support above a metallic table plate. The LISN signal is evaluated by an EMI receiver. The simulation results are compared to the measurement in Fig. 9. The measurement result is shown in green. Up to frequencies of 1 MHz, we observe the characteristic decay of the spectrum of a rectangular periodic signal with 1/n, where n is the number of the harmonic, or, respectively, 20 dB/decade. The simple model of Fig. 5 accurately describes this behavior as long as the differential mode is dominant. Above 1 MHz, at the 7th harmonic, the measured spectrum shows a plateau. This plateau is generated by the common mode capacitance of the load. At about 1 MHz, the impedance caused by the capacitance between load and metallic table is sufficiently low to turn the common mode into the dominant interferer. The augmented simulation model of Fig. 7 describes this broadband noise accurately up to 10 MHz. Above 10 MHz, the measured spectrum exhibits some resonances, which are caused by more intricate couplings of inductances and capacitances, which cannot be predicted by such a simple circuit model. Still, an accuracy of about 10 dB within the frequency range from the fundamental harmonic to at least 40 MHz is an excellent match, considering the few ingredients that are needed to assemble the model. We like to add that with this model, the impact of the common mode capacitance can be studied. Reducing this capacitance to a lower value shifts the frequency, from which the common mode dominates, to higher values; increasing it increases the impact of the common mode. This simple model can be used to study the impact of the geometry of load on the electromagnetic emission.

Table 2 summarizes the subcomponents that are needed to model the CISPR25 conducted emission. In a very simple functional model, which describes the differential mode, the supply voltage, the values of the DC link capacitor and the load and the clock frequency must be known, as used by the hardware engineer who designs the circuit. Furthermore, a model of the Line Impedance Stabilization Network (LISN) is needed and a model of the EMI receiver, if the clock frequency is smaller than the frequency band of the EMI receiver. Such a model works fine as long as the differential mode is dominant. Using an application with the given rise and fall times of the transistor and some 10 pF parasitic capacitance, the break-even range is at about 1 MHz. To extend the model, the parasitic capacitance of the load must be hooked to the switching node. The break-even point can be estimated by simulation, simply adding the capacitance and studying the behavior of the common versus the differential mode. To improve the model at frequencies above a frequency of 1/π t_r. the rise time of the drain-source voltage must be modeled for the switch (or the fall time, whichever is larger). Eventually, the parasitic inductance and resistance of the DC link capacitor must be included.

Using a GaN half bridge we demonstrate, at frequencies between some 100 kHz and 30 MHz, the simulation of conducted emission of a power electronic system according to the CISPR25 standard. The fundamental harmonics are accurately predicted with a model made of subcomponents that each hardware engineer can readily provide. Merely the EMC measurement equipment needs to be added. With increasing frequency, parasitic elements must be considered. To achieve a reasonable estimation up to 30 MHz, the capacitive coupling of the load to the metallic table must be measured and added to the switching node. We show that the estimation of the conducted emission within the given frequency range is straightforward if the rules presented in this paper are taken into account.